Papilio One board

To flash an LED at a specific frequency we need to divide the input clock frequency. In VHDL this can be done using counters. The Papilio One FPGA board comes with a 32MHz oscillator. 32Mhz means 32 million pulses per second, if you wanted to divide this down to 1Hz you could just set an output low, count 16 million pulses then set this output high and count 16 million pulses again. There ya have it! Any frequency you want can be had using this method (any frequency less than the input frequency anyway).

The formula for calculating the number of clock pulses you should count to get a certain frequency is given by :

So for example to get 1Hz with 50% duty cycle:

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.all;
entity blink is
port(
L0 : out std_logic := '0';
i_clk : in std_logic := '0'
);
end blink;
architecture behaviour of blink is
--count to 16 million for 1Hz
constant c_CNT_1HZ : natural := 16000000;
--this signal acts as the counter
signal r_CNT_1HZ : natural range 0 to c_CNT_1HZ;
--this signal will toggle at 1Hz
signal r_TOGGLE_1HZ : std_logic := '0';
begin
p_1_Hz : process(i_clk) is
begin
if rising_edge(i_clk) then
if r_CNT_1HZ = c_CNT_1HZ then
r_TOGGLE_1HZ <= not r_TOGGLE_1HZ;
r_CNT_1HZ <= 0;
else
r_CNT_1HZ <= r_CNT_1HZ + 1;
end if;
end if;
end process p_1_HZ;
L0 <= r_TOGGLE_1HZ;
end behaviour;

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